Integrated Chip Optical CDMA for Transport Layer Security
Navy SBIR 2010.2 - Topic N102-123 NAVAIR - Mrs. Janet McGovern - [email protected] Opens: May 19, 2010 - Closes: June 23, 2010 N102-123 TITLE: Integrated Chip Optical CDMA for Transport Layer Security TECHNOLOGY AREAS: Information Systems, Sensors, Electronics ACQUISITION PROGRAM: Joint Strike Fighter ACAT I RESTRICTION ON PERFORMANCE BY FOREIGN CITIZENS (i.e., those holding non-U.S. Passports): This topic is "ITAR Restricted." The information and materials provided pursuant to or resulting from this topic are restricted under the International Traffic in Arms Regulations (ITAR), 22 CFR Parts 120 - 130, which control the export of defense-related material and services, including the export of sensitive technical data. Foreign Citizens may perform work under an award resulting from this topic only if they hold the "Permanent Resident Card", or are designated as "Protected Individuals" as defined by 8 U.S.C. 1324b(a)(3). If a proposal for this topic contains participation by a foreign citizen who is not in one of the above two categories, the proposal will be rejected. OBJECTIVE: Develop an integrated chip for CDMA (code division multiple access) to implement multi-level security in a fiber optic avionics network DESCRIPTION: Code division multiple access (CDMA) has long been used by the wireless telecom industry for secure broadcast and select network architectures, where only the intended user with the correct code will be able to decode the signal. Optical CDMA has shown promise as an approach to address the need for multi-level security (MLS) in military optical avionics multi-core processor networks. While optical implementation of CDMA has been demonstrated using custom arrayed waveguides and other passive elements, current state of the art technology using discrete individual photonic components are on the order of 1,000�s of cm3 and does not meet the form factor requirements for aircraft use. In particular, use of discrete individual components does not achieve the form factor reduction that can be achieved even if the individual component size is reduced further because of the minimum volumes required for individual packaging. It is thought that a reduction in OCDMA package size could be achieved by integrating active and passive optical waveguide elements with complementary metal-oxide semiconductor (CMOS) on a single chip. If achievable, this integration would eliminate the need for intermediate fiber to device interfaces and could possibly yield two orders of magnitude in size reduction. Emerging silicon photonics technology has shown promise in this area. Anticipated technology challenges associated with this research include integration of passive photonic filter, detector and CMOS electronics for Size, Weight and Power (SWaP) reduction; developing photonic chip filters at sufficient resolution to fit within existing Dense Wavelength Division Multiple-access (DWDM) channel wavelength constraints; achieving temperature insensitivity in the design; and, incorporating re-configurability in the OCDMA code. PHASE I: Analyze the feasibility and develop a design concept for an integrated optical CDMA communication system that addresses multi-level security (MLS). Feasibility should include performing design simulations and numerical analysis to develop a design approach for an integrated optical CDMA decoder, including as many of the following elements on the chip: passive optical elements, filters, photodetectors, and back-end amplifiers. The design trade-offs should include consideration of device fabrication tolerances, filter stability, level of security that can be achieved, and process integration. Specify the materials and processes that would be utilized to fabricate the decoder and demonstrate key fabrication capabilities. PHASE II: Fabricate a prototype OCDMA module incorporating a photonic chip decoder with integrated passive and active photonic elements for demonstration and testing. The prototype chip may use external electronics but the design must be compatible with future integration of standard CMOS circuitry using standard design rules. The chip package should include all necessary optical and electrical interfaces for laboratory demonstration and testing. Test the OCDMA module in a laboratory testbed. PHASE III: Productize the OCDMA module with integration of the CMOS and back-end electronics such as transimpedance amplifiers and microwave switches into the OCDMA decoder chip. Package the chip for system level testing and demonstration in a network testbed. Perform environmental testing and qualification on the packaged device. Transition the OCDMA module in Navy avionics and data networks for aircraft and other platforms. PRIVATE SECTOR COMMERCIAL POTENTIAL/DUAL-USE APPLICATIONS: This technology has potential applications in commercial data communications networks, such as in data centers and local area networks. REFERENCES: 2. Y.S. Tang, Y. Xu, and J. K. Chan, "Development and Prospective of SOI-Based Photonic Components for Optical CDMA Application," Proc. SPIE, Vol. 3953, 1-8, (2000). 3. Y.S. Tang, H.C. Shi, J. Bartha, and J. Chan, "Advances in Developing SOI Based Optical CDMA Chips," Proc. SPIE, Vol. 4293, 10-14, (2001). 4. K. Sayano, I. Nguyen, and J. K. Chan, "Demonstration of Multi-Channel Optical CDMA for Free Space Communications," Proc. SPIE, Vol. 4272, p. 38, (2001). 5. S. Etemad et al., "Optical Encryption for WDM Networks," OFC/NFOEC 2009. KEYWORDS: Optical Networks; CDMA; Optical CDMA; Code Multiplexing; Multi-Level Security (MLS); Multi-Core Processors
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