Automated Generation of Advanced Test Diagrams to Reduce Test Program Set Life-Cycle Costs
Navy SBIR FY2010.1
Sol No.: |
Navy SBIR FY2010.1 |
Topic No.: |
N101-029 |
Topic Title: |
Automated Generation of Advanced Test Diagrams to Reduce Test Program Set Life-Cycle Costs |
Proposal No.: |
N101-029-0915 |
Firm: |
Diamond Glen Software 4316 Marina City Dr
Unit 831
Marina del Rey, California 90292-5819 |
Contact: |
Geoffrey Ingram |
Phone: |
(310) 821-2395 |
Web Site: |
www.diamondglen.com |
Abstract: |
The three Key Personnel dedicated to the investigation/analysis for this SBIR N101-029 proposal have already designed and developed a working automatic Test Diagram Generator, which we called TDGen. TDGen generated thousands of Test Diagrams for fifteen C130 METS TPSs. The new version of TDGen as a result of this feasibility study will be named the Dynamic Test Diagram Generator (D-TDGen). This proposal will describe the process by which Diamond Glen Software will investigate the feasibility of using ATML as the input to D-TDGen and the inclusion of stimulus and measurement signal parameters in the D-TDGen Test Diagrams. Our previous experience in developing the C130 METS TDGEN product results in minimal risk and a high probability of success in the design and development of the new and improved Dynamic Test Diagram Generator (D-TDGen). |
Benefits: |
The market potential of D-TDGen for commercial applications will apply to any commercial industry that can benefit from detailed System Interconnect Diagrams (SIDs) for systems containing multiple subassemblies. D-TDGen will reduce costs associated with the development of (SIDs), improve the accuracy of the SIDs, save engineering hours and reduce costs associated with systems design/development, integration/debug, maintenance and troubleshooting and simplification of any systems analysis efforts associated with design changes. Since D-TDGen will generate System Interconnect Diagrams of signal current flow through connector/wire paths including passive and active circuit components (including FPGA's and CPLD's) and relays, the potential for automatically generating complex system interconnect diagrams is practically unlimited. Potential commercial applications include: * Commercial aircraft avionics test applications * Any commercial electronics test application such as manufacturing test, Environmental Qualification Testing, Design Verification Testing (DVT) * Commercial Industrial control systems * Automotive industry * Medical Electronics industry * Entertainment electronics systems * Ground Based flight control systems * Electro-Mechanical based Trainer systems * Computer based data systems * Communication systems |
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