Fast, High Resolution 3-D Flash LIDAR Imager
Navy SBIR FY2010.1
Sol No.: |
Navy SBIR FY2010.1 |
Topic No.: |
N101-083 |
Topic Title: |
Fast, High Resolution 3-D Flash LIDAR Imager |
Proposal No.: |
N101-083-0122 |
Firm: |
Pacific Microchip Corp. 11949 Jefferson Blvd. #105
Los Angeles, California 90230-6336 |
Contact: |
Denis Zelenin |
Phone: |
(310) 683-2628 |
Web Site: |
pacificmicrochip.com |
Abstract: |
Mine and obstacle detection in very shallow water and through the surf-zone is an extremely challenging technical problem. A recent Navy system uses a 3-D LIDAR employing an image tube with a GaAsP photocathode and an anode based on a silicon PIN diode array bump bonded to a ROIC. The Navy system also uses a range-gated camera for more accurate image analysis at specific water depths. Pacific Microchip Corp. proposes replacing the two sophisticated cameras with a high resolution, light, robust, and low cost monolithic 1024 x 1024 pixel, 56 ranging bin 3-D imager. High light sensitivity, built-in anti-blooming, and wide dynamic range offer high image contrast and effective rejection of the solar and laser glints. A novel data serialization simplifies interfacing at low power consumption. A unique imager topology permits combining four focal planes to build a 4.2M pixel 3-D imager panel for future Navy missions. The proposed ASIC will be manufactured on 200mm CMOS wafers. During Phase I a circuit design and in silico validation of the imager will be provided. Phase II will result in a product ready for commercialization in Phase III. |
Benefits: |
The high resolution monolithic 3-D imager will find immediate use in airborne reconnaissance for mines and obstacles in very shallow water and the surf zone. The proposed Phase I work will result in designs of critical circuits verified in simulations for implementation on the 3-D imager chip. The physical chip design, layout implementation on the die, and fabrication of the chips based on the selected CMOS technology using a Multi Project Wafer program will be done in Phase II. Upon delivery of fabricated chips by the foundry, the packaging, testing, and characterization of the die will be done using Pacific Microchip Corp. facilities and equipment as well as those at our UCLA partners. Tested imagers will be delivered for further evaluation and testing within the Navy's LIDAR systems under development. |
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